265 search results - page 17 / 53 » Optimal hierarchical energy efficient design for MANETs |
DAC
2002
ACM
15 years 10 months ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
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GLOBECOM
2007
IEEE
15 years 1 months ago
2007
IEEE
Recently, cooperative routing in wireless networks has gained much interest due to its ability to exploit the broadcast nature of the wireless medium in designing powerefficient ro...
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper first presents an accurate and efficient method of estimating the short circuit energy dissipation and the output transition time of CMOS buffers. Next the paper descri...
TWC
2008
14 years 9 months ago
2008
Abstract-- In many portable devices, wireless network interfaces consume upwards of 30% of scarce system energy. Reducing the transceiver's power consumption to extend the sys...
IPCCC
2006
IEEE
15 years 3 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...