1768 search results - page 284 / 354 » Optimal routing in Chord |
109
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FCCM
2002
IEEE
15 years 6 months ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
ISAAC
2001
Springer
15 years 6 months ago
2001
Springer
We consider a problem faced by train companies: How can trains be assigned to satisfy scheduled routes in a cost efficient way? Currently, many railway companies create solutions b...
113
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DAC
1999
ACM
15 years 6 months ago
1999
ACM
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
122
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VLSID
2010
IEEE
15 years 5 months ago
2010
IEEE
Abstract—Microfluidics-based biochips are revolutionizing highthroughput sequencing, parallel immunoassays, clinical diagnostics, and drug discovery. These devices enable the pre...
123
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ICCTA
2007
IEEE
15 years 5 months ago
2007
IEEE
In this paper, we propose a placement method for islandstyle FPGAs, based on fast yet very good initial placement followed by refinement using ultra-low temperature Simulated Anne...