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» Optimal scheduling of task graphs on parallel systems
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ICS
2009
Tsinghua U.
15 years 6 months ago
/scratch as a cache: rethinking HPC center scratch storage
To sustain emerging data-intensive scientific applications, High Performance Computing (HPC) centers invest a notable fraction of their operating budget on a specialized fast sto...
Henry M. Monti, Ali Raza Butt, Sudharshan S. Vazhk...
HICSS
2003
IEEE
132views Biometrics» more  HICSS 2003»
15 years 5 months ago
Markets for Reliability and Financial Options in Electricity: Theory to Support the Practice
The underlying structure of why and how consumers value reliability of electric service is explored, together with the technological options and cost characteristics for the provi...
Timothy Mount, William Schulze, Richard E. Schuler
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 4 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
14 years 10 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
PPOPP
2010
ACM
15 years 6 months ago
An adaptive performance modeling tool for GPU architectures
This paper presents an analytical model to predict the performance of general-purpose applications on a GPU architecture. The model is designed to provide performance information ...
Sara S. Baghsorkhi, Matthieu Delahaye, Sanjay J. P...