54 search results - page 3 / 11 » Optimal simultaneous mapping and clustering for FPGA delay o... |
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
The paper presents several improvements to state-of-theart in FPGA technology mapping exemplified by a recent advanced technology mapper DAOmap [Chen and Cong, ICCAD `04]. Improve...
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
In this paper, we present an optimal algorithm for solving the simultaneous technology mapping and linear placement problem for tree-structured circuits with the objective of mini...
FPGA
2004
ACM
15 years 2 months ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
FPGA
2007
ACM
15 years 3 months ago
2007
ACM
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
This paper presents a new technology mapper, WireMap. The mapper uses an edge flow heuristic to improve the routability of a mapped design. The heuristic is applied during the ite...