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DAC
2003
ACM
15 years 10 months ago
Optimal integer delay budgeting on directed acyclic graphs
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahas...
TCAD
2010
97views more  TCAD 2010»
14 years 4 months ago
Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
IPPS
2003
IEEE
15 years 2 months ago
Gene Clustering Using Self-Organizing Maps and Particle Swarm Optimization
Gene clustering, the process of grouping related genes in the same cluster, is at the foundation of different genomic studies that aim at analyzing the function of genes. Microarr...
Xiang Xiao, Ernst R. Dow, Russell C. Eberhart, Zin...
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
15 years 2 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
15 years 3 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier