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» Optimal task placement to improve cache performance
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HPCA
2009
IEEE
15 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
NOSSDAV
2009
Springer
15 years 4 months ago
Web 2.0 traffic measurement: analysis on online map applications
In recent years, web based online map applications have been getting more and more popular, such as Google Maps, Yahoo Maps. Many new Web 2.0 techniques such as mash-up and AJAX w...
Song Lin, Zhiguo Gao, Ke Xu
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
14 years 9 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
VEE
2009
ACM
107views Virtualization» more  VEE 2009»
15 years 4 months ago
Architectural support for shadow memory in multiprocessors
Runtime monitoring support serves as a foundation for the important tasks of providing security, performing debugging, and improving performance of applications. Often runtime mon...
Vijay Nagarajan, Rajiv Gupta
EDBT
2008
ACM
161views Database» more  EDBT 2008»
15 years 9 months ago
Load distribution of analytical query workloads for database cluster architectures
Enterprises may have multiple database systems spread across the organization for redundancy or for serving different applications. In such systems, query workloads can be distrib...
Thomas Phan, Wen-Syan Li