862 search results - page 23 / 173 » Optimal task placement to improve cache performance |
PLDI
1995
ACM
15 years 1 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Abstract— Regular structures are present in many types of circuits. If this structure can be identified and utilized, performance can be improved dramatically. In this paper, we...
GLVLSI
2010
IEEE
15 years 2 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
GRAPHICSINTERFACE
2004
14 years 11 months ago
2004
We investigate menu selection in circular and rectangular pop-up menus using stylus-driven direct input on horizontal and vertical display surfaces. An experiment measured perform...
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RTSS
2003
IEEE
15 years 2 months ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...