862 search results - page 46 / 173 » Optimal task placement to improve cache performance |
MOBIHOC
2003
ACM
15 years 9 months ago
2003
ACM
In this paper, we address the problem of energy-conscious cache placement in wireless ad hoc networks. We consider a network comprising a server with an interface to the wired net...
CODES
2000
IEEE
15 years 2 months ago
2000
IEEE
We present a technique for task response time improvement based on the concept of code motion from the software domain. Relaxed Operation Motion (ROM) is a simple yet powerful app...
ASPDAC
2005
ACM
15 years 3 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
CGO
2005
IEEE
15 years 3 months ago
2005
IEEE
Optimization of a real world application BLAST is used to demonstrate the limitations of static and profile-guided optimizations and to highlight the potential of runtime optimiz...
VLSID
2007
IEEE
15 years 4 months ago
2007
IEEE
As the VLSI technology scales towards the nanometer regime, circuit performance is increasingly affected by variations. These variations need to be considered at an early stage in...