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MICRO
1998
IEEE
128views Hardware» more  MICRO 1998»
15 years 2 months ago
Putting the Fill Unit to Work: Dynamic Optimizations for Trace Cache Microprocessors
The fill unit is the structure which collects blocks of instructions and combines them into multi-block segments for storage in a trace cache. In this paper, we expand the role of...
Daniel H. Friendly, Sanjay J. Patel, Yale N. Patt
ISMAR
2008
IEEE
15 years 4 months ago
An evaluation of graphical context when the graphics are outside of the task area
An ongoing research problem in Augmented Reality (AR) is to improve tracking and display technology in order to minimize registration errors. However, perfect registration is not ...
Cindy M. Robertson, Blair MacIntyre, Bruce N. Walk...
DEXA
2001
Springer
151views Database» more  DEXA 2001»
15 years 2 months ago
Cache Conscious Clustering C3
The two main techniques of improving I/O performance of Object Oriented Database Management Systems(OODBMS) are clustering and buffer replacement. Clustering is the placement of o...
Zhen He, Alonso Marquez
RTSS
2005
IEEE
15 years 3 months ago
Optimal Task Rate Selection in Fixed Priority Systems
The design phase of any real-time system requires balancing the limited computational resources against the functional requirements and the performance of the application. The opt...
Enrico Bini, Marco Di Natale
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
15 years 3 months ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali