862 search results - page 52 / 173 » Optimal task placement to improve cache performance |
IM
2007
14 years 11 months ago
2007
— We investigate methodologies for placement and migration of logical data stores in virtualized storage systems leading to optimum system configuration in a dynamic workload sc...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
HIPEAC
2007
Springer
15 years 3 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
VEE
2006
ACM
15 years 3 months ago
2006
ACM
Many new Java runtime optimizations report relatively small, single-digit performance improvements. On modern virtual and actual hardware, however, the performance impact of an op...