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MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
15 years 3 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
MICRO
2007
IEEE
184views Hardware» more  MICRO 2007»
15 years 4 months ago
Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
Michael L. Chu, Rajiv A. Ravindran, Scott A. Mahlk...
DAC
2004
ACM
15 years 10 months ago
An approach to placement-coupled logic replication
We present a set of techniques for placement-coupled, timingdriven logic replication. Two components are at the core of the approach. First is an algorithm for optimal timingdrive...
Milos Hrkic, John Lillis, Giancarlo Beraudo
RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
15 years 4 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes
ISMIR
2005
Springer
165views Music» more  ISMIR 2005»
15 years 3 months ago
Inferring Efficient Hierarchical Taxonomies for MIR Tasks: Application to Musical Instruments
A number of approaches for automatic audio classification are based on hierarchical taxonomies since it is acknowledged that improved performance can be thereby obtained. In this...
Slim Essid, Gaël Richard, Bertrand David