862 search results - page 57 / 173 » Optimal task placement to improve cache performance |
110
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ISCA
2011
IEEE
14 years 3 months ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
118
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ACMMSP
2005
ACM
15 years 5 months ago
2005
ACM
In general-purpose applications, most data is dynamically allocated. The memory manager therefore plays a crucial role in application performance by determining the spatial locali...
106
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ISPD
2006
ACM
15 years 5 months ago
2006
ACM
Linear programming (LP) based methods are attractive for solving the placement problem because of their ability to model Half-Perimeter Wirelength (HPWL) and timing. However, it h...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—Advances in chip-multiprocessor processing capabilities has led to an increased power consumption and temperature hotspots. Maintaining the on-chip temperature is import...
GLVLSI
2008
IEEE
15 years 6 months ago
2008
IEEE
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...