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IPPS
1998
IEEE
15 years 2 months ago
A Mapping Methodology for Designing Software Task Pipelines for Embedded Signal Processing
Abstract. In this paper, we present a methodology for mapping an Embedded Signal Processing ESP application onto HPC platforms such that the throughput performance is maximized. Pr...
Myungho Lee, Wenheng Liu, Viktor K. Prasanna
ASPDAC
2006
ACM
126views Hardware» more  ASPDAC 2006»
15 years 3 months ago
A novel instruction scratchpad memory optimization method based on concomitance metric
Scratchpad memory has been introduced as a replacement for cache memory as it improves the performance of certain embedded systems. Additionally, it has also been demonstrated tha...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...
MICRO
1997
IEEE
128views Hardware» more  MICRO 1997»
15 years 2 months ago
Run-Time Spatial Locality Detection and Optimization
As the disparity between processor and main memory performance grows, the number of execution cycles spent waiting for memory accesses to complete also increases. As a result, lat...
Teresa L. Johnson, Matthew C. Merten, Wen-mei W. H...
DPD
2007
165views more  DPD 2007»
14 years 9 months ago
Context-based caching and routing for P2P web service discovery
In modern heterogeneous environments, such as mobile, pervasive and ad-hoc networks, architectures based on web services offer an attractive solution for effective communication a...
Christos Doulkeridis, Vassilis Zafeiris, Kjetil N&...
IOPADS
1996
100views more  IOPADS 1996»
14 years 11 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...