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» Optimal task placement to improve cache performance
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DAC
2003
ACM
15 years 10 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
MOBISYS
2007
ACM
15 years 9 months ago
Improving mobile database access over wide-area networks without degrading consistency
We report on the design, implementation, and evaluation of a system called Cedar that enables mobile database access with good performance over low-bandwidth networks. This is acc...
Niraj Tolia, Mahadev Satyanarayanan, Adam Wolbach
EMSOFT
2010
Springer
14 years 7 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran
HPCA
2000
IEEE
15 years 2 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
PPOPP
2009
ACM
15 years 10 months ago
Comparability graph coloring for optimizing utilization of stream register files in stream processors
A stream processor executes an application that has been decomposed into a sequence of kernels that operate on streams of data elements. During the execution of a kernel, all stre...
Xuejun Yang, Li Wang, Jingling Xue, Yu Deng, Ying ...