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ISPASS
2006
IEEE
15 years 3 months ago
Comparing simulation techniques for microarchitecture-aware floorplanning
— Due to the long simulation times of the reference input sets, microarchitects resort to alternative techniques to speed up cycle-accurate simulations. However, the reduction in...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
JDWM
2006
178views more  JDWM 2006»
14 years 9 months ago
Improved Data Partitioning for Building Large ROLAP Data Cubes in Parallel
The pre-computation of data cubes is critical to improving the response time of On-Line Analytical Processing (OLAP) systems and can be instrumental in accelerating data mining ta...
Ying Chen, Frank K. H. A. Dehne, Todd Eavis, Andre...
POPL
2007
ACM
15 years 10 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...
EUROPAR
2010
Springer
14 years 10 months ago
Power-Efficient Spilling Techniques for Chip Multiprocessors
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
Enric Herrero, José González, Ramon ...
GECCO
2004
Springer
15 years 3 months ago
GA-Facilitated Knowledge Discovery and Pattern Recognition Optimization Applied to the Biochemistry of Protein Solvation
Abstract. The authors present a GA optimization technique for cosinebased k-nearest neighbors classification that improves predictive accuracy in a class-balanced manner while sim...
Michael R. Peterson, Travis E. Doom, Michael L. Ra...