Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
Abid M. Malik, Michael Chase, Tyrel Russell, Peter...
— In this paper, we present an analytic model and methodology to determine optimal scheduling policy that involves two dimension space allocation: time and code, in High Speed Do...
Hussein Al-Zubaidy, Jerome Talim, Ioannis Lambadar...
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
Transportation and logistics are fertile areas for modeling. Simulation has traditionally been used in warehousing and inside the distribution center or processing hub in the truc...
John S. Carson II, Mani S. Manivannan, Mark K. Bra...
Instruction scheduling hardware can be simplified and easily pipelined if pairs of dependent instructions are fused so they share a single instruction scheduling slot. We study an...