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ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
15 years 3 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
CF
2005
ACM
15 years 3 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
EUROPAR
2008
Springer
15 years 3 months ago
MPC: A Unified Parallel Runtime for Clusters of NUMA Machines
Over the last decade, Message Passing Interface (MPI) has become a very successful parallel programming environment for distributed memory architectures such as clusters. However, ...
Marc Pérache, Hervé Jourdren, Raymon...
ATMOS
2007
15 years 3 months ago
Maintenance of Multi-level Overlay Graphs for Timetable Queries
In railways systems the timetable is typically represented as a weighted digraph on which itinerary queries are answered by shortest path algorithms, usually running Dijkstra’s a...
Francesco Bruera, Serafino Cicerone, Gianlorenzo D...
BIOCOMP
2008
15 years 3 months ago
Reverse Engineering Module Networks by PSO-RNN Hybrid Modeling
Background: Inferring a gene regulatory network (GRN) from high throughput biological data is often an under-determined problem and is a challenging task due to the following reas...
Yuji Zhang, Jianhua Xuan, Benildo de los Reyes, Ro...
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