44 search results - page 4 / 9 » Optimality study of logic synthesis for LUT-based FPGAs |
ICCAD
2007
IEEE
15 years 6 months ago
2007
IEEE
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
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FPGA
2004
ACM
15 years 3 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
ASAP
2009
IEEE
15 years 6 months ago
2009
IEEE
—This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workb...
SBCCI
2006
ACM
15 years 3 months ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...