44 search results - page 6 / 9 » Optimality study of logic synthesis for LUT-based FPGAs |
DAC
2002
ACM
15 years 10 months ago
2002
ACM
A regular circuit structure called a River PLA and its reconfigurable version, Glacier PLA, are presented. River PLAs provide greater regularity than circuits implemented with sta...
ICCAD
2007
IEEE
15 years 3 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
ASPDAC
2009
ACM
15 years 4 months ago
2009
ACM
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
FPL
2009
Springer
15 years 2 months ago
2009
Springer
Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier...