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ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 10 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
GECCO
2003
Springer
129views Optimization» more  GECCO 2003»
15 years 10 months ago
Inherent Fault Tolerance in Evolved Sorting Networks
This poster paper summarizes our research on fault tolerance arising as a by-product of the evolutionary computation process. Past research has shown evidence of robustness emergin...
Rob Shepherd, James A. Foster
PASTE
2010
ACM
15 years 10 months ago
Learning universal probabilistic models for fault localization
Recently there has been significant interest in employing probabilistic techniques for fault localization. Using dynamic dependence information for multiple passing runs, learnin...
Min Feng, Rajiv Gupta
PLDI
2010
ACM
15 years 10 months ago
Supporting speculative parallelization in the presence of dynamic data structures
The availability of multicore processors has led to significant interest in compiler techniques for speculative parallelization of sequential programs. Isolation of speculative s...
Chen Tian, Min Feng, Rajiv Gupta
IDEAS
2002
IEEE
113views Database» more  IDEAS 2002»
15 years 10 months ago
Scalable QoS-Aware Disk-Scheduling
A new quality of service (QoS) aware disk scheduling algorithm is presented. It is applicable in environments where data requests arrive with different QoS requirements such as re...
Walid G. Aref, Khaled El-Bassyouni, Ibrahim Kamel,...
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