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VLSID
2002
IEEE
100views VLSI» more  VLSID 2002»
15 years 11 months ago
Layout-Driven Timing Optimization by Generalized De Morgan Transform
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
Supratik Chakraborty, Rajeev Murgai
HOTOS
2007
IEEE
15 years 10 months ago
Don't Settle for Less Than the Best: Use Optimization to Make Decisions
Many systems design, configuration, runtime and management decisions must be made from a large set of possible alternatives. Ad hoc heuristics have traditionally been used to make...
Kimberly Keeton, Terence Kelly, Arif Merchant, Cip...
JCIT
2007
63views more  JCIT 2007»
15 years 6 months ago
Optimizing Reaching Definitions Overhead in Queue Processors
Queue computers are a viable option for embedded systems design. Queue computers feature a dense instruction set, high parallelism, low hardware complexity. In this paper we propo...
Yuki Nakanishi, Arquimedes Canedo, Ben A. Abderaze...
WSC
2008
15 years 8 months ago
A particle filtering framework for randomized optimization algorithms
We propose a framework for optimization problems based on particle filtering (also called Sequential Monte Carlo method). This framework unifies and provides new insight into rand...
Enlu Zhou, Michael C. Fu, Steven I. Marcus
DLOG
2001
15 years 7 months ago
Optimizing Reasoning in Description Logics with Qualified Number Restrictions
In this extended abstract an optimization technique, the so-called signature calculus, for reasoning with number restrictions in description logics is investigated. The calculus i...
Volker Haarslev, Ralf Möller