Sciweavers

14761 search results - page 2897 / 2953
» Optimization in Data Mining
Sort
View
CODES
2005
IEEE
15 years 3 months ago
Designing real-time H.264 decoders with dataflow architectures
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
Youngsoo Kim, Suleyman Sair
CODES
2005
IEEE
15 years 3 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
HICSS
2005
IEEE
154views Biometrics» more  HICSS 2005»
15 years 3 months ago
Market Structure and the Predictability of Electricity System Line Flows: An Experimental Analysis
Robert Thomas has shown, using simulations of experimental results, that the power flow on any line in an electric network is linearly proportional to the total system load when t...
Nodir Adilov, Thomas Light, Richard E. Schuler, Wi...
HPDC
2005
IEEE
15 years 3 months ago
Collective caching: application-aware client-side file caching
Parallel file subsystems in today’s high-performance computers adopt many I/O optimization strategies that were designed for distributed systems. These strategies, for instance...
Wei-keng Liao, Kenin Coloma, Alok N. Choudhary, Le...
ICPPW
2005
IEEE
15 years 3 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
« Prev « First page 2897 / 2953 Last » Next »