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VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
15 years 10 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
WSC
2004
14 years 11 months ago
Towards Adaptive Caching for Parallel and Discrete Event Simulation
We investigate factors that impact the effectiveness of caching to speed up discrete event simulation. Walsh and Sirer have shown that a variant of function caching (staged simula...
Abhishek Chugh, Maria Hybinette
IEEEPACT
2006
IEEE
15 years 3 months ago
Whole-program optimization of global variable layout
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
Nathaniel McIntosh, Sandya Mannarswamy, Robert Hun...
SPAA
2009
ACM
15 years 6 months ago
Brief announcement: low depth cache-oblivious sorting
Cache-oblivious algorithms have the advantage of achieving good sequential cache complexity across all levels of a multi-level cache hierarchy, regardless of the specifics (cache...
Guy E. Blelloch, Phillip B. Gibbons, Harsha Vardha...
ICDCS
2002
IEEE
15 years 2 months ago
Accelerating Internet Streaming Media Delivery using Network-Aware Partial Caching
Internet streaming applications are affected by adverse network conditions such as high packet loss rates and long delays. This paper aims at mitigating such effects by leveraging...
Shudong Jin, Azer Bestavros, Arun Iyengar