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ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
15 years 7 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
ICCD
2005
IEEE
111views Hardware» more  ICCD 2005»
15 years 6 months ago
Supply Voltage Degradation Aware Analytical Placement
Increasingly significant power/ground supply voltage degradation in nanometer VLSI designs leads to system performance degradation and even malfunction. Existing techniques focus...
Andrew B. Kahng, Bao Liu, Qinke Wang
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
15 years 6 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
15 years 6 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
PADL
2010
Springer
15 years 6 months ago
Automating Mathematical Program Transformations
Abstract. Mathematical programs (MPs) are a class of constrained optimization problems that include linear, mixed-integer, and disjunctive programs. Strategies for solving MPs rely...
Ashish Agarwal, Sooraj Bhat, Alexander Gray, Ignac...