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» Optimization techniques for small matrix multiplication
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ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
14 years 1 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
LCPC
2005
Springer
15 years 3 months ago
A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization
The goal of this work is a systematic approach to compiler optimization for simultaneously optimizing across multiple levels of the memory hierarchy. Our approach combines compiler...
Chun Chen, Jacqueline Chame, Mary W. Hall, Kristin...
PDPTA
2007
14 years 11 months ago
A collective I/O implementation based on Inspector-Executor paradigm
In this paper we present a multiple phase I/O collective operation for generic block cyclic distributions. The communication pattern is automatically generated by an inspector pha...
David E. Singh, Florin Isaila, Juan Carlos Pichel,...
ECCV
2004
Springer
15 years 11 months ago
Steering in Scale Space to Optimally Detect Image Structures
Detecting low-level image features such as edges and ridges with spatial filters is improved if the scale of the features are known a priori. Scale-space representations and wavele...
Jeffrey Ng, Anil A. Bharath
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
15 years 6 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...