Since the onset of pipelined processors, balancing the delay of the microarchitectural pipeline stages such that each microarchitectural pipeline stage has an equal delay has been...
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...
In the past, the creators of numerical programs had to choose between simple expression of mathematical formulas and static type checking. While the Lisp family and its dynamically...
Vincent St-Amour, Sam Tobin-Hochstadt, Matthew Fla...
We consider a system of compute and storage resources geographically distributed over a large number of locations connected via a wide-area network. By distributing the resources,...
Moritz Steiner, Bob Gaglianello Gaglianello, Vijay...
Enterprise search is challenging for several reasons, notably the dynamic terminology and jargon that are specific to the enterprise domain. This challenge is partly addressed by...