Sciweavers

34170 search results - page 162 / 6834
» Optimization
Sort
View
ASPDAC
2006
ACM
129views Hardware» more  ASPDAC 2006»
15 years 9 months ago
Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA)
With shrinking technology, the timing variation of a digital circuit is becoming the most important factor while designing a functionally reliable circuit. Gate sizing has emerged...
Vineet Agarwal, Janet Meiling Wang
RTAS
2005
IEEE
15 years 9 months ago
Improving WCET by Optimizing Worst-Case Paths
It is advantageous to perform compiler optimizations to lower the WCET of a task since tasks with lower WCETs are easier to schedule and more likely to meet their deadlines. Compi...
Wankang Zhao, William C. Kreahling, David B. Whall...
112
Voted
KES
2005
Springer
15 years 9 months ago
Optimal Remediation Design in Groundwater Systems by Intelligent Techniques
Abstract. This research develops an optimal planning model for pump-treatinject based groundwater remediation systems. Optimizing the design of the pump-treat-inject system is a no...
Hone-Jay Chu, Chin-Tsai Hsiao, Liang-Cheng Chang
136
Voted
PATMOS
2005
Springer
15 years 9 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
109
Voted
CGO
2003
IEEE
15 years 8 months ago
An Infrastructure for Adaptive Dynamic Optimization
Dynamic optimization is emerging as a promising approach to overcome many of the obstacles of traditional static compilation. But while there are a number of compiler infrastructu...
Derek Bruening, Timothy Garnett, Saman P. Amarasin...