34170 search results - page 318 / 6834 » Optimization |
122
click to vote
ASYNC
2007
IEEE
15 years 11 months ago
2007
IEEE
Future deep sub-micron technologies will be characterized by large parametric variations, which could make asynchronous design an attractive solution for use on large scale. Howev...
129
click to vote
DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
144
Voted
DATE
2007
IEEE
15 years 11 months ago
2007
IEEE
We present a decomposition strategy to speed up constraint optimization for a representative multiprocessor scheduling problem. In the manner of Benders decomposition, our techniq...
146
click to vote
ICDAR
2007
IEEE
15 years 11 months ago
2007
IEEE
In this paper, we propose a multi-objective optimization method for SVM model selection using the well known NSGA-II algorithm. FA and FR rates are the two criteria used to find ...
139
click to vote
ISCAS
2007
IEEE
15 years 11 months ago
2007
IEEE
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...