34170 search results - page 362 / 6834 » Optimization |
161
Voted
FPGA
2006
ACM
15 years 8 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
139
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CGO
2003
IEEE
15 years 8 months ago
2003
IEEE
Existing profile-guided partial redundancy elimination (PRE) methods use speculation to enable the removal of partial redundancies along more frequently executed paths at the expe...
132
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LCR
2000
Springer
15 years 8 months ago
2000
Springer
Abstract. We present two new compiler optimizations for explicitly parallel programs based on the CSSAME form: Lock-Independent Code Motion (LICM) and Mutex Body Localization (MBL)...
123
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TPHOL
2000
IEEE
15 years 8 months ago
2000
IEEE
This paper outlines a formal model of the Intel IA-64 architecture, and explains how this model can be used to verify the correctness of assembly-level code optimizations. The form...
129
Voted
ISCAS
1995
IEEE
15 years 8 months ago
1995
IEEE
We present a novel technique for datapath allocation, which incorporates interconnection area and delay estimates based on dynamic oorplanning. In this approach, datapath area is ...