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171
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ISQED
2010
IEEE
141views Hardware» more  ISQED 2010»
16 years 2 months ago
Assessing chip-level impact of double patterning lithography
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...
194
Voted
ASPLOS
2010
ACM
16 years 2 months ago
CoreDet: a compiler and runtime system for deterministic multithreaded execution
The behavior of a multithreaded program does not depend only on its inputs. Scheduling, memory reordering, timing, and low-level hardware effects all introduce nondeterminism in t...
Tom Bergan, Owen Anderson, Joseph Devietti, Luis C...
POPL
2010
ACM
16 years 2 months ago
Lightweight asynchrony using parasitic threads
Message-passing is an attractive thread coordination mechanism because it cleanly delineates points in an execution when threads communicate, and unifies synchronization and comm...
K. C. Sivaramakrishnan, Lukasz Ziarek, Raghavendra...
PPOPP
2010
ACM
16 years 2 months ago
An adaptive performance modeling tool for GPU architectures
This paper presents an analytical model to predict the performance of general-purpose applications on a GPU architecture. The model is designed to provide performance information ...
Sara S. Baghsorkhi, Matthieu Delahaye, Sanjay J. P...
SAC
2010
ACM
16 years 2 months ago
Adaptive internet services through performance and availability control
Cluster-based multi-tier systems provide a means for building scalable Internet services. Building adaptive Internet services that are able to apply appropriate system sizing and ...
Jean Arnaud, Sara Bouchenak
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