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ISVD
2007
IEEE
16 years 14 days ago
Two-dimensional line space Voronoi Diagram
Given a set of points called sites, the Voronoi diagram is a partition of the plane into sets of points having the same closest site. Several generalizations of the Voronoi diagra...
Stéphane Rivière, Dominique Schmitt
ISVLSI
2007
IEEE
184views VLSI» more  ISVLSI 2007»
16 years 14 days ago
Activity-Aware Registers Placement for Low Power Gated Clock Tree Construction
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
MICRO
2007
IEEE
94views Hardware» more  MICRO 2007»
16 years 14 days ago
Uncorq: Unconstrained Snoop Request Delivery in Embedded-Ring Multiprocessors
Snoopy cache coherence can be implemented in any physical network topology by embedding a logical unidirectional ring in the network. Control messages are forwarded using the ring...
Karin Strauss, Xiaowei Shen, Josep Torrellas
MICRO
2007
IEEE
133views Hardware» more  MICRO 2007»
16 years 14 days ago
Revisiting the Sequential Programming Model for Multi-Core
Single-threaded programming is already considered a complicated task. The move to multi-threaded programming only increases the complexity and cost involved in software developmen...
Matthew J. Bridges, Neil Vachharajani, Yun Zhang, ...
MICRO
2007
IEEE
139views Hardware» more  MICRO 2007»
16 years 14 days ago
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors
DRAM memory is a major resource shared among cores in a chip multiprocessor (CMP) system. Memory requests from different threads can interfere with each other. Existing memory acc...
Onur Mutlu, Thomas Moscibroda
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