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CGO
2004
IEEE
15 years 8 months ago
Static Identification of Delinquent Loads
The effective use of processor caches is crucial to the performance of applications. It has been shown that cache misses are not evenly distributed throughout a program. In applic...
Vlad-Mihai Panait, Amit Sasturkar, Weng-Fai Wong
CGO
2004
IEEE
15 years 8 months ago
Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...
Hongbo Rong, Alban Douillet, Ramaswamy Govindaraja...
CGO
2004
IEEE
15 years 8 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
ASIACRYPT
2006
Springer
15 years 8 months ago
Extending Scalar Multiplication Using Double Bases
Abstract. It has been recently acknowledged [4, 6, 9] that the use of double bases representations of scalars n, that is an expression of the form n = e,s,t(-1)e As Bt can speed up...
Roberto Maria Avanzi, Vassil S. Dimitrov, Christop...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
15 years 8 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
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