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» Optimizations for LTL Synthesis
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71
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ICCAD
2007
IEEE
118views Hardware» more  ICCAD 2007»
15 years 9 months ago
Timing variation-aware high-level synthesis
—This work proposes a new yield computation technique dedicated to HLS, which is an essential component in timing variationaware HLS research field. The SSTAs used by the curren...
Jongyoon Jung, Taewhan Kim
98
Voted
ICCAD
2003
IEEE
117views Hardware» more  ICCAD 2003»
15 years 9 months ago
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible...
Saurabh N. Adya, Igor L. Markov, Paul Villarrubia
113
Voted
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 7 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
15 years 5 months ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...
ISPD
2009
ACM
112views Hardware» more  ISPD 2009»
15 years 7 months ago
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...
Wan-Ping Lee, Diana Marculescu, Yao-Wen Chang