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» Optimizations for LTL Synthesis
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DAC
2006
ACM
15 years 12 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang
91
Voted
DAC
2006
ACM
15 years 12 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
84
Voted
DATE
2009
IEEE
102views Hardware» more  DATE 2009»
15 years 5 months ago
Register placement for high-performance circuits
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura
AUSSOIS
2001
Springer
15 years 3 months ago
An Augment-and-Branch-and-Cut Framework for Mixed 0-1 Programming
In recent years the branch-and-cut method, a synthesis of the classical branch-and-bound and cutting plane methods, has proven to be a highly successful approach to solving large-s...
Adam N. Letchford, Andrea Lodi
GECCO
2007
Springer
192views Optimization» more  GECCO 2007»
15 years 2 months ago
A new crossover technique for Cartesian genetic programming
Genetic Programming was first introduced by Koza using tree representation together with a crossover technique in which random sub-branches of the parents' trees are swapped ...
Janet Clegg, James Alfred Walker, Julian Francis M...