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» Optimizations for LTL Synthesis
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DAC
2004
ACM
15 years 2 months ago
Quadratic placement using an improved timing model
The performance of timing-driven placement methods depends strongly on the choice of the net model. In this paper a more precise net model is presented that does not increase nume...
Bernd Obermeier, Frank M. Johannes
83
Voted
FPGA
2006
ACM
139views FPGA» more  FPGA 2006»
15 years 2 months ago
Fast and accurate resource estimation of automatically generated custom DFT IP cores
This paper presents an equation-based resource utilization model for automatically generated discrete Fourier transform (DFT) soft core IPs. The parameterized DFT IP generator all...
Peter A. Milder, Mohammad Ahmad, James C. Hoe, Mar...
83
Voted
ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
15 years 2 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
82
Voted
LICS
1997
IEEE
15 years 2 months ago
How Much Memory is Needed to Win Infinite Games?
We consider a class of infinite two-player games on finitely coloured graphs. Our main question is: given a winning condition, what is the inherent blow-up (additional memory) of ...
Stefan Dziembowski, Marcin Jurdzinski, Igor Waluki...
WCRE
1997
IEEE
15 years 2 months ago
Reverse Engineering is Reverse Forward Engineering
Reverse Engineering is focused on the challenging task of understanding legacy program code without having suitable documentation. Using a transformational forward engineering per...
Ira D. Baxter, Michael Mehlich