894 search results - page 43 / 179 » Optimizations for LTL Synthesis |
114
Voted
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
Traditional synthesis techniques optimize CMOS circuits in two phases i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in ...
107
Voted
GLVLSI
2008
IEEE
15 years 7 months ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
84
Voted
ICASSP
2009
IEEE
15 years 4 months ago
2009
IEEE
We provide an analysis of the algorithms necessary for the optimal use of multidimensional signal reconstruction from multichannel acquisition. Firstly, we provide computable cond...
109
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FPGA
2007
ACM
15 years 6 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
89
Voted
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
Presynthesis optimizations transform a behavioral HDL description into an optimized HDL description that results in improved synthesis results. In this paper we introduce the decom...