894 search results - page 44 / 179 » Optimizations for LTL Synthesis |
115
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DAC
1995
ACM
15 years 2 months ago
1995
ACM
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
ICCAD
1999
IEEE
15 years 3 months ago
1999
IEEE
: Carry-save-adder(CSA) is one of the most widely used schemes for fast arithmetic in industry. This paper provides a solution to the problem of finding an optimal-timing allocatio...
102
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ISCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
ICCAD
1997
IEEE
15 years 3 months ago
1997
IEEE
We developed a new hierarchical modular approach for synthesis of area-minimal core-based data-intensive systems. The optimization approach employs a novel global least-constraini...
ISQED
2003
IEEE
15 years 4 months ago
2003
IEEE
In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. ...