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» Optimizations for LTL Synthesis
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AIPS
2003
15 years 13 days ago
Synthesis of Hierarchical Finite-State Controllers for POMDPs
We develop a hierarchical approach to planning for partially observable Markov decision processes (POMDPs) in which a policy is represented as a hierarchical finite-state control...
Eric A. Hansen, Rong Zhou
ICEC
1994
147views more  ICEC 1994»
15 years 11 days ago
VLSI Circuit Synthesis Using a Parallel Genetic Algorithm
A parallel implementation of a genetic algorithm used to evolve simple analog VLSI circuits is described. The parallel computer system consisted of twenty distributed SPARC workst...
Mike Davis, Luoping Liu, John G. Elias
ICCAD
2010
IEEE
166views Hardware» more  ICCAD 2010»
14 years 9 months ago
Low-power clock trees for CPUs
Clock networks contribute a significant fraction of dynamic power and can be a limiting factor in high-performance CPUs and SoCs. The need for multi-objective optimization over a l...
Dongjin Lee, Myung-Chul Kim, Igor L. Markov
RTSS
2002
IEEE
15 years 4 months ago
A Fast Resource Synthesis Technique for Energy-Efficient Real-Time System
We consider a resource synthesis technique for realtime systems where the energy budget is limited and the performance of the system depends on how resources and energy are used. ...
Dong-In Kang, Stephen P. Crago, Jinwoo Suh
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
15 years 3 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo