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» Optimizations for LTL Synthesis
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ASPDAC
2008
ACM
169views Hardware» more  ASPDAC 2008»
15 years 2 months ago
Buffered clock tree synthesis for 3D ICs under thermal variations
In this paper, we study the buffered clock tree synthesis problem under thermal variations for 3D IC technology. Our major contribution is the Balanced Skew Theorem, which provides...
Jacob R. Minz, Xin Zhao, Sung Kyu Lim
96
Voted
CVIU
2006
219views more  CVIU 2006»
15 years 21 days ago
Boundary matting for view synthesis
In the last few years, new view synthesis has emerged as an important application of 3D stereo reconstruction. While the quality of stereo has improved, it is still imperfect, and...
Samuel W. Hasinoff, Sing Bing Kang, Richard Szelis...
TVLSI
2008
120views more  TVLSI 2008»
15 years 17 days ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
100
Voted
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
15 years 9 months ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
104
Voted
EUROGRAPHICS
2010
Eurographics
15 years 8 months ago
Bidirectional Search for Interactive Motion Synthesis
We present an approach to improve the search efficiency for near-optimal motion synthesis using motion graphs. An optimal or near-optimal path through a motion graph often leads ...
Wan-Yen Lo and Matthias Zwicker