894 search results - page 91 / 179 » Optimizations for LTL Synthesis |
106
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DAC
2008
ACM
16 years 1 months ago
2008
ACM
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
103
Voted
ICMCS
2005
IEEE
15 years 6 months ago
2005
IEEE
In this paper, we develop a novel real-time, interactive, automatic multimodal exploratory environment that dynamically adapts the media presented, to user context. There are two ...
ISSS
1998
IEEE
15 years 5 months ago
1998
IEEE
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
ISLPED
1997
ACM
15 years 4 months ago
1997
ACM
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
110
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FCCM
2004
IEEE
15 years 4 months ago
2004
IEEE
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...