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» Optimizations for LTL Synthesis
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ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 4 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
104
Voted
INTEGRATION
2006
82views more  INTEGRATION 2006»
15 years 21 days ago
On whitespace and stability in physical synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible ...
Saurabh N. Adya, Igor L. Markov, Paul G. Villarrub...
95
Voted
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
14 years 11 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
134
Voted
CAIP
2009
Springer
202views Image Analysis» more  CAIP 2009»
14 years 10 months ago
Near-Regular Texture Synthesis
This paper describes a method for seamless enlargement or editing of difficult colour textures containing simultaneously both regular periodic and stochastic components. Such textu...
Michal Haindl, Martin Hatka
EMSOFT
2011
Springer
14 years 13 days ago
From boolean to quantitative synthesis
Motivated by improvements in constraint-solving technology and by the increase of routinely available computational power, partial-program synthesis is emerging as an effective a...
Pavol Cerný, Thomas A. Henzinger