155 search results - page 9 / 31 » Optimizations for a Highly Cost-Efficient Programmable Logic... |
116
click to vote
IPPS
2009
IEEE
15 years 8 months ago
2009
IEEE
In this paper we discuss our initial experiences adapting OpenMP to enable it to serve as a programming model for high performance embedded systems. A high-level programming model...
101
Voted
FCCM
1999
IEEE
15 years 6 months ago
1999
IEEE
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
100
click to vote
ARITH
2009
IEEE
15 years 8 months ago
2009
IEEE
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
95
Voted
FCCM
2004
IEEE
15 years 5 months ago
2004
IEEE
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
118
click to vote
ARC
2010
Springer
15 years 1 months ago
2010
Springer
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...