57 search results - page 4 / 12 » Optimized Analog Mappings for Distributed Source-Channel Cod... |
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
ITC
2003
IEEE
15 years 2 months ago
2003
IEEE
Store-and-generate techniques encode a given test set and regenerate the original test set during the test with the help of a decoder. Previous research has shown that runlength c...
ICS
2004
Tsinghua U.
15 years 3 months ago
2004
Tsinghua U.
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...
90
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ICC
2007
IEEE
15 years 4 months ago
2007
IEEE
–Retransmission based schemes are not suitable for energy constrained wireless sensor networks. Hence, there is an interest in including parity bits in each packet for error cont...
107
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MSR
2009
ACM
15 years 2 months ago
2009
ACM
Researchers continue to demonstrate the benefits of Mining Software Repositories (MSR) for supporting software development and research activities. However, as the mining process...