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ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
15 years 3 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
BSN
2009
IEEE
160views Sensor Networks» more  BSN 2009»
15 years 4 months ago
BSN Simulator: Optimizing Application Using System Level Simulation
—A biomonitoring application running on wireless BAN has stringent timing and energy requirements. Developing such applications therefore presents unique challenges in both hardw...
Ioana Cutcutache, Thi Thanh Nga Dang, Wai Kay Leon...
NSDI
2010
14 years 7 months ago
AccuRate: Constellation Based Rate Estimation in Wireless Networks
This paper proposes to exploit physical layer information towards improved rate selection in wireless networks. While existing schemes pick good transmission rates, this paper tak...
Souvik Sen, Naveen Santhapuri, Romit Roy Choudhury...
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 2 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
CODES
2005
IEEE
15 years 3 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...