52 search results - page 8 / 11 » Optimized Timed Hardware Software Cosimulation without Roll-... |
102
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DAC
2007
ACM
15 years 3 months ago
2007
ACM
While cryptographic algorithms are usually strong against mathematical attacks, their practical implementation, both in software and in hardware, opens the door to side-channel at...
123
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LCTRTS
1999
Springer
15 years 4 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
134
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ISCA
2011
IEEE
14 years 3 months ago
2011
IEEE
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
105
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CASES
2005
ACM
15 years 1 months ago
2005
ACM
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
101
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DSD
2010
IEEE
14 years 12 months ago
2010
IEEE
—Current general-purpose memory allocators do not provide sufficient speed or flexibility for modern highperformance applications. To optimize metrics like performance, memory us...