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» Optimizing Compilation of CLP(R)
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ISPASS
2010
IEEE
15 years 5 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
15 years 4 months ago
Componentizing hardware/software interface design
Abstract—Building highly optimized embedded systems demands hardware/software (HW/SW) co-design. A key challenge in co-design is the design of HW/SW interfaces, which is often a ...
Kecheng Hao, Fei Xie
ICSM
2009
IEEE
15 years 4 months ago
Incremental call graph reanalysis for AspectJ software
Program call graph representation can be used to support many tasks in compiler optimization, program comprehension, and software maintenance. During software evolution, the call ...
Yu Lin, Sai Zhang, Jianjun Zhao
GLVLSI
2008
IEEE
112views VLSI» more  GLVLSI 2008»
15 years 4 months ago
Instruction cache leakage reduction by changing register operands and using asymmetric sram cells
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...
Maziar Goudarzi, Tohru Ishihara
SCAM
2008
IEEE
15 years 4 months ago
Aspect-Aware Points-to Analysis
Points-to analysis is a fundamental analysis technique whose results are useful in compiler optimization and software engineering tools. Although many points-to analysis algorithm...
Qiang Sun, Jianjun Zhao