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» Optimizing Compilation of CLP(R)
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IFL
1997
Springer
15 years 2 months ago
WITH-Loop-Folding in SAC - Condensing Consecutive Array Operations
This paper introduces a new compiler optimization called with-loop-folding. It is based on a special loop construct, the withloop, which in the functional language Sac (for Single ...
Sven-Bodo Scholz
CASES
2007
ACM
15 years 2 months ago
An integrated ARM and multi-core DSP simulator
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
Sharad Singhai, MingYung Ko, Sanjay Jinturkar, May...
110
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CASES
2007
ACM
15 years 2 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
DATE
2004
IEEE
122views Hardware» more  DATE 2004»
15 years 1 months ago
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
Markus Lorenz, Peter Marwedel
ICLP
1995
Springer
15 years 1 months ago
A Method for Implementing Equational Theories as Logic Programs
Equational theories underly many elds of computing, including functional programming, symbolic algebra, theorem proving, term rewriting and constraint solving. In this paper we sh...
Mantis H. M. Cheng, Douglas Stott Parker Jr., Maar...