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» Optimizing Compilation of CLP(R)
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CGO
2003
IEEE
15 years 3 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
VLDB
1992
ACM
151views Database» more  VLDB 1992»
15 years 1 months ago
A Uniform Approach to Processing Temporal Queries
Research in temporal databases has mainly focused on defining temporal data models by extending existing models, and developing access structures for temporal data. Little has bee...
Umeshwar Dayal, Gene T. J. Wuu
FPL
2006
Springer
211views Hardware» more  FPL 2006»
15 years 1 months ago
Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony's PlayStation 2 vector units offer scope for hardware acceleration of applications. We compa...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
ICS
2010
Tsinghua U.
15 years 7 days ago
Speeding up Nek5000 with autotuning and specialization
Autotuning technology has emerged recently as a systematic process for evaluating alternative implementations of a computation, in order to select the best-performing solution for...
Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun...
IJCIS
1998
116views more  IJCIS 1998»
14 years 9 months ago
Distributed Query Scheduling Service: An Architecture and Its Implementation
We present the systematic design and development of a distributed query scheduling service DQS in the context of DIOM, a distributed and interoperable query mediation system 26 ...
Ling Liu, Calton Pu, Kirill Richine