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CONCURRENCY
2006
140views more  CONCURRENCY 2006»
14 years 10 months ago
An efficient memory operations optimization technique for vector loops on Itanium 2 processors
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
William Jalby, Christophe Lemuet, Sid Ahmed Ali To...
DAC
2009
ACM
15 years 10 months ago
Optimal static WCET-aware scratchpad allocation of program code
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
Heiko Falk, Jan C. Kleinsorge
CP
2009
Springer
15 years 10 months ago
Constraint-Based Optimal Testing Using DNNF Graphs
The goal of testing is to distinguish between a number of hypotheses about a systemfor example, dierent diagnoses of faults by applying input patterns and verifying or falsifying t...
Anika Schumann, Martin Sachenbacher, Jinbo Huang
CP
2009
Springer
15 years 4 months ago
Reasoning about Optimal Collections of Solutions
The problem of finding a collection of solutions to a combinatorial problem that is optimal in terms of an inter-solution objective function exists in many application settings. F...
Tarik Hadzic, Alan Holland, Barry O'Sullivan
IEEEPACT
2009
IEEE
15 years 4 months ago
Interprocedural Load Elimination for Dynamic Optimization of Parallel Programs
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
Rajkishore Barik, Vivek Sarkar