The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Abstract. This paper describes the implementation of a prototype locationaware tourist information system. Particular emphasis is paid to the layered architecture and the rapid con...
R. P. O'Rafferty, Michael J. O'Grady, Gregory M. P...
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
We propose a companion solution to iSCSI that is more suited for virtualization of local computer bus architectures, such as PCI/PCI-X and PCI Express. We explore the architecture ...
As heterogeneous distributed systems, multi-agent systems present some challenging con guration management issues. There are the problems of knowing how to allocate agents to comp...
Joseph A. Giampapa, Octavio H. Juarez-Espinosa, Ka...